1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device which is configured to have an air gap defined between adjacent memory cells, and the semiconductor device fabricated by the method.
2. Description of the Related Art
A flash memory can maintain stored data even without power supply thereto and have accordingly been widely used as a memory element for a multimedia card. The memory capacity of the flash memory has recently been desired to be increased. For this purpose, high integration of memory cells is further necessitated. Technical problems posed by high integration of memory cells include an increase in a capacitance between cells adjacent to each other. A silicon oxide is buried between gate electrodes of adjacent memory cells as an insulator in an ordinary structure of the memory element. The silicon oxide can be formed easily and has a dielectric constant that is about half of that of a silicon nitride, so that the silicon oxide can reduce a capacitance between adjacent memory cells. However, a capacitance between adjacent memory cells is increased in inverse proportion to a distance therebetween as an interval of memory cells is reduced. As a result, an operating speed of the memory element is reduced and a malfunction (in data write and/or readout) occurs.
In view of the above-described problem, the conventional art has suggested a configuration in which nothing is formed between gate electrodes of adjacent memory cells, that is, a configuration in which an air gap with a minimum dielectric constant is defined, in order that the capacity between adjacent memory cells may be reduced (see Japanese patent application publication JP-A-2007-157927). An air gap has conventionally been formed by covering an upper part of each gate electrode when a silicon oxide film is buried between the gate electrodes. However, it has been difficult to form an air gap controllably by the conventional method.